SoC-FPGA Design/Verification Manager for a Start-up
Aug 9, 2018 Start-up,   N/A

SoC-FPGA Design/Verification Manager for a Start-up

 

Job Description and Requirements:

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Manage and lead a team that is responsible for delivering FPGA+MIPI+SoC silicon from project integration, verification, to production.  Hiring company has in-house FPGA development tools from Synthesis, place, routing and static timing analysis.  Currently we are working on an FPGA+MIPI+SoC device using TSMC 55nm LP technology.  We are looking for a strong candidate to integrate/tapeout the chip and convert this chip into a production for mass market.

 

The FPGA should integrate various components, e.g.,  MCU, UART, I2C, JTAG, etc. to form a larger System on Chip (SoC) with additional functional blocks such as MIPI interface (DSI, D-PHY) and LVDS for specific market segments.

 

Overall, this candidate for this FPGA team leader position should have experiences as the following.

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Hands-on design experience on all or some of the following circuit blocks for Field Programmable Gate Array (FPGA) chip. e.g., 

  - SRAM,

  - routing muxes,

  - LUT,

  - Block RAM, 

  - DSP functional blocks like fixed point and floating point MAC.

 

. Design processes skills/experiences

  - logic design and simulation (Verilog)

-    circuit design and simulation (SPICE, HSIM, etc.), 

  - layout implementation management,

  - circuit characterization,

  - RTL to GDS physical design/implementation from blocks to full chip (synthesis, floor planning, place and route, power analysis/planning, timing closure and clock tree synthesis, etc.)

  - physical verification (LVS/DRC/ANT/ERC, RC extraction, IR drop and EM analysis, etc.)

  - PrimeTime STA

  - DFT (Design for Testing)

 

 

If you are interested in this opening, please contact:

 

Steve Lu,  (C) 408-981-6683, steve.km.lu@gmail.com