Digital IP Design Engineer
Jul 10, 2019 創意電子 Global Unitchip Corp, GUC ,   Taiwan

Responsibilities:
1. DDR/LPDDR/GDDR/HBM logic design and verification.
2. RTL design.
3. Digital Design Checks : CDC, LEC, STA, and etc.

Requirements:
1. 3+ years digital design experiences.
2. Familiar with  DDR/LPDDR/HBM/SerDes or DSP  is plus.
3. Familar with digital IC front-end design flow such as Verilog RTL design, Synopsys Design Compiler, LEC, Spygalss, PrimeTime STA.

Corporate Website: http://www.globalunichip.com/en-global
For submitting the resume, please send it to: tiff_liang@itri.org.tw;a989102@itri.org.tw;serena_lee@itri.org.tw