Req. NumberJob TitleLocationNotesClick
2100004QSenior and Junior Physical Design Verification EngineerSan JoseVerification experience with a strong interest in doing PD verification and fix DRC/LVS/EMIR, etc.Apply
 2100002ILayout EngineerSan JoseAt least AA degree with minimum 5 years of direct memory and layoutexperience.

BS degree with minimum 2-3 years of direct memory and layout experience.

2100001FFront End Design & Automation EngineerAustinMinimum 1-2 years of experience developing verilog/VHDL, driving netlist, EDA tools, complex SoCs, and strong python skills.Apply
21000009APR & Chip- Integration Design Flow & Methodology Development EngineerSan JoseAt least 3 years of digital design, design flow, and chip implementation experienceApply
200000EISystem Benchmarking Engineer/ ManagerSan Jose or AustinMS or PhD degree with at least 3 years of relevant experience

Keywords: system-level integration, benchmarks , performance analysis, cache hierarchy, 3D stacking

200000DBProject ManagerSan JoseEE related background

Advanced node experience

Process experience

2100003UProject ManagerSan JoseBachelor’s or Master’s Degree in Electrical Engineering or similar with 3+ years of industry experience

Design and Technology knowledge in one or more of the following areas: Digital, Analog, RF or Mixed-Signal design, MEMS, CIS, SiPho, Automotive, HV, System engineering.

Advanced/Mature Process Knowledge.

200000EBStandard Cell Circuit EngineerSan DiegoMS or PhD degree with at least 3 years of relevant experience.Apply
200000CZSenior Physical Design EngineerAustinMinimum MS or PhD degree and minimum of 3 years of working experience.
200000AFDigital Design EngineerAustinMinimum 5 years of experience.Apply
200000CKSr. Layout EngineerSan JoseAt least AA degree with 20 yrs exp, BS preferred. Advance nodes experience (min. 14nm or 16nm)Apply
19000071Sr. Engineer ASIC Physical DesignSan Joseat least 2 years of related industry experience.Apply
200000A0ASIC SYN & Timing Flow EngineerSan Joseat least 2 years of related industry experience.Apply
200000AEStandard Cell Library Design EngineerAustin or San JoseCircuit design, Layout design, optimization, extraction, characterization

No New Grads

1900004TSenior Physical Design EngineerSan JosePhysical implementation experience on RTL2GDS or Netlist2GDS. 3-8 years of experience.Apply
2000007KSRAM Design EngineerAustinBachelor’s Degree with min. 5 years, Master’s Degree with min. 3 years experience in compiler memoryApply
19000006/ 1800001Y/ 1700006HSRAM Design EngineerSan JoseBachelor’s Degree with min. 5 years, Master’s Degree with min. 3 years’ experience in compiler memory, PhD with 0 experience is ok (But experience in research project)Apply
19000091Analog Design Engineer – Data ConvertersAustinMUST HAVE: At least 5+ years of direct experience in high-speed (>100MSPS) and high resolution ADCs, including but not limited to SAR ADC, Pipelined/SAR ADC, Hybrid ADCs, Inter-leaving of ADCs.

Experience in over-sampled ADCs (Switched Capacitor and high BW Continuous Time) architectures is a plus

20000002Chiplet Integration Design Solution Development Engineer/ ManagerSan JoseMaster’s Degree with at least 3 years of experience in semiconductor and packaging

IC Design + Packaging + PC Board experience.

1900008ICustom Design Flow Methodology EngineerSan JoseRelevant/adequate experience in PDK related knowledge with advanced nodes.

Looking for 5~ 10 Yr exp.

1900007DASIC Design Methodology & Flow Application EngineerSan JoseMandarin Speaker preferredApply


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