moffett ai


  • Responsible for SoC system functions and feasibility analysis of AI chips
  • Responsible for AI chip software and hardware function partition and SoC system architecture spec
  • Responsible for the detailed design of AI SoC chip including address space partition, chip interface and timing
  • Develop system emulators through languages ​​such as C++/SystemC/Python and evaluate the performance of the AI SoC chip system, and propose design improvement
  • Write up architecture and microarchitecture documents and collaborate with RTL design and verification engineers
  • Work closely with other architects/hardware and software engineers for implementation, integration, and test plan development and execution



  • Possess a Master’s, PhD in EE/CS/CE or more than 6 years of relevant professional experience with successful complex chip tape-out experience
  • Experience in designing complex SoC systems such as CPU/GPU/AI chips
  • Experience with SoC bus (AXI/APB), NoC, video codec, CPU, GPU, host interface (PCIe) and memory technology (DDR)
  • Experience with VLSI design and verification, especially in power optimization methodologies
  • Strong working knowledge of ASIC design flow from RTL design to backend implementation
  • C/C++, Python scripting and Verilog design experience
  • Excellent written and oral communication, excellent organizational skills and high self-motivation


    • 401(k)
    • Dental insurance
    • Health insurance
    • Paid time off
    • Vision insurance
    • Lifeinsurance
    • Freeonsite lunch


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