moffett ai

RESPONSIBILITIES:

  • Work with software and hardware engineering groups to design AI accelerator and SoC
  • Write detail specifications and define micro-architecture of the design
  • Implement high performance design using high-quality RTL coding techniques
  • Work with performance modeling/analysis team to enhance the performance
  • Collaborate with the verification team on the verification test plan, coverage analysis, and full-chip simulation plus debug
  • Work with the physical design team in aiding the implementation of the functional blocks
  • Work with multiple design groups to shape future design
  • Support the post silicon team to bring up silicon in the lab
  • Work with the software team to ensure product meets customer use cases

REQUIREMENTS:

  • BS/MS in Electronics Engineering with minimum of 3 years of RTL design experiences
  • Strong Verilog/SystemVerilog RTL coding skill
  • Experience in Micro Architecture/Resoruce tradeoff, SoC Integration, CDC, LINT
  • Experience with performing synthesis, timing analysis/timing closure, formal verification/LEC, DFT Design expertise
  • Hands on experience in AI chip design is a good plus
  • Knowledge with CPU/GPU/DSP/AI Accelerator Architecture Desig
  • Familiarity with revision control concepts and tools (e.g. GIT

BENEFITS:

  • 401(k)
  • Dental insurance
  • Health insurance
  • Paid time off
  • Vision insurance
  • Life-insurance
  • Freeonsite lunch

 

 

To apply for this job email your details to hr@moffett.ai