• Full Time
  • Anywhere

Requirements:

  • MS with 8+ years of experience or PhD (with 3+ years of experience) in Electrical Engineering, Computer Engineering, Computer Science, or related degree
  • In depth knowledge of UVM/OVM, Semiformal Verification, assertion-based verification as well as hardware and software co-verification methodology.
  • Extensive experience of building verification infrastructure, test planning, coverage closure, testbench and testcases development for function/performance verification.
  • Proficient experience with Verilog, System Verilog, Python/Perl/TCL/Shell scripting, C/C++, System C and industry mainstream ISAs assembly coding.
  • Familiarity with MIPI, AMBA (APB/AHB/AXI) bus protocol, RISC-V/ARM or DSP core.
  • Experience in verifying designs at both of RTL level and post-P&R gate level.
  • Ability to work in a startup environment, and to work both independently and as a team player with the ability to provide technical leadership to other members of the engineering team

 

Experience in one or more of the following areas considered a strong plus:

  • Working knowledge of AI/ML Computing, GPU, ISP architectures and accelerators
  • Experience in verifying mix-signal design and interface of digital and analog.
  • Experience of design verification for highspeed IO such as PCIE and DDR.

 

To apply for this job email your details to caspa@caspa.com