• Bachelor’s in Electrical /Computer Engineering
  • 5+ years of experience in RTL2GDS flow & has taped out designs in advanced processes
  • Knowledge of Cadence and/or Synopsys tools
  • Strong scripting skills in TCL/python/Perl
  • Must have excellent debugging skills & ability to prioritize tasks/issues
  • Experience in signoff STA/LVS/DRC flows of advanced processes – preferred


  • Developing Back End flow using Cadence and Synopsys tools
  • Implementation of ASIC units using advanced flows
  • Provide support to customers in the implementation company IP’s & resolve any challenges
  • Provide continuous feedback to R&D to improve the product

Personal skills:

  • Innovation
  • Team player
  • Commitment
  • Customer orientation – Advantage


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