Job Description
This is an R&D Position for FPGA Design for Advantest's industry
leading system level tester platform for Solid State Storage industry.
Successful candidate will be responsible for all aspects of FPGA Design
from concept to Design release: feature definition and architecture,
design implementation, functional verification, synthesis, timing closure,
hardware verification and qualification for production readiness. Design
areas include Advantest proprietary IP as well as designs based on
industry standard technologies such as DDR DRAM, serial and parallel
busses such as PCI Express, I2C,I3C, SMBus, SATA, SAS etc.) . These
FPGA designs provide control, data processing and algorithmic pattern
generation capabilities for Advantest's multi-protocol SSD test platform.
Be part of the Advantest MPT3000 team with a focus on delivering
industry-leading SSD Test systems. MPT3000 Test Systems allows
manufacturers to improves engineering efficiency with powerful, easy-to-
use software tools and a revolutionary flexible architecture, enabling
accelerated SSD product development and a faster time-to-
manufacturing ramp.
Responsibilities include:
 Develop detailed FPGA architecture and definition from high
level requirements.
 Implement FPGA based design for functional blocks.
 Simulation and design verification at block and system level
 Synthesis and Timing closure
 Hardware Debug and verification
 Work closely with other team members (FPGA, Software,
Electrical and Applications Engineers) to resolve issues

Minimum Qualifications: Requirements:

 BS/MS EE or equivalent with 15+ years of experience.
 Excellent understanding of fundamentals of digital logic design
and computer architectures.
 Experience with industry standard serial and parallel protocols
such: PCIe, SMBus, I2C, I3C etc. .
 Extensive experience with high performance FPGA design,
timing closure and debugging.
 Proven track record of taking a strong role on at least one
significant FPGA from concept to completion.
 Verilog code expertise a must. Familiarity with TCL or other
scripting language strongly preferred. Additional coding
experience with "C", PERL, shell scripts considered a plus
 Extensive experience with Altera or Xilinx tool chain and IPs.
Experience with Vivado and Modelsim a plus.
 Must have good communication and organizational skills and
able to self manage.
 Excellent team work and interpersonal skills; ability to work as
part of a multi-disciplinary team (FPGA, Software, Electrical and
Applications engineers)
 Passion for building best in class products.
 Eligible to work in the United States

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