• Develop and document innovative micro-architectures according to the algorithm spec
  • Help algorithm team to improve the algorithm fit for design and have better PPA

Design video/ISP/display related IP with Verilog/System Verilo

  • Analyze and implement low power designs
  • Perform initial synthesis & timing analysis
  • Communicate and cooperate with multi-site design team to implement the whole IP system
  • Assist verification team in unit verification and test plan
  • Cooperate with verification team to debug/verify the design
  • debug the chip together with different teams


Job Qualifications:

  • BS/MS/PHD in Electrical Engineering or related STEM
  • Solid experience in digital design, preferably in Video/ISP/Display related design and implementation
  • Solid experience with products that have gone to volume production
  • Solid Experience and knowledge in low power design techniques
  • Good communication skills and good team player.
  • Good knowledge about the ISP, Video Processing, HDMI, DP, Panel or related fields preferred



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