TSMC Jobs

Req. Number Job Title Location Notes Click
2100004Q Senior and Junior Physical Design Verification Engineer San Jose Verification experience with a strong interest in doing PD verification and fix DRC/LVS/EMIR, etc. Apply
 2100002I Layout Engineer San Jose At least AA degree with minimum 5 years of direct memory and layoutexperience.

BS degree with minimum 2-3 years of direct memory and layout experience.

Apply
2100001F Front End Design & Automation Engineer Austin Minimum 1-2 years of experience developing verilog/VHDL, driving netlist, EDA tools, complex SoCs, and strong python skills. Apply
21000009 APR & Chip- Integration Design Flow & Methodology Development Engineer San Jose At least 3 years of digital design, design flow, and chip implementation experience Apply
200000EI System Benchmarking Engineer/ Manager San Jose or Austin MS or PhD degree with at least 3 years of relevant experience

Keywords: system-level integration, benchmarks , performance analysis, cache hierarchy, 3D stacking

Apply
200000DB Project Manager San Jose EE related background

Advanced node experience

Process experience

Apply
2100003U Project Manager San Jose Bachelor’s or Master’s Degree in Electrical Engineering or similar with 3+ years of industry experience

Design and Technology knowledge in one or more of the following areas: Digital, Analog, RF or Mixed-Signal design, MEMS, CIS, SiPho, Automotive, HV, System engineering.

Advanced/Mature Process Knowledge.

Apply
200000EB Standard Cell Circuit Engineer San Diego MS or PhD degree with at least 3 years of relevant experience. Apply
200000CZ Senior Physical Design Engineer Austin Minimum MS or PhD degree and minimum of 3 years of working experience.
200000AF Digital Design Engineer Austin Minimum 5 years of experience. Apply
200000CK Sr. Layout Engineer San Jose At least AA degree with 20 yrs exp, BS preferred. Advance nodes experience (min. 14nm or 16nm) Apply
19000071 Sr. Engineer ASIC Physical Design San Jose at least 2 years of related industry experience. Apply
200000A0 ASIC SYN & Timing Flow Engineer San Jose at least 2 years of related industry experience. Apply
200000AE Standard Cell Library Design Engineer Austin or San Jose Circuit design, Layout design, optimization, extraction, characterization

No New Grads

Apply
1900004T Senior Physical Design Engineer San Jose Physical implementation experience on RTL2GDS or Netlist2GDS. 3-8 years of experience. Apply
2000007K SRAM Design Engineer Austin Bachelor’s Degree with min. 5 years, Master’s Degree with min. 3 years experience in compiler memory Apply
19000006/ 1800001Y/ 1700006H SRAM Design Engineer San Jose Bachelor’s Degree with min. 5 years, Master’s Degree with min. 3 years’ experience in compiler memory, PhD with 0 experience is ok (But experience in research project) Apply
Apply
Apply
19000091 Analog Design Engineer – Data Converters Austin MUST HAVE: At least 5+ years of direct experience in high-speed (>100MSPS) and high resolution ADCs, including but not limited to SAR ADC, Pipelined/SAR ADC, Hybrid ADCs, Inter-leaving of ADCs.

Experience in over-sampled ADCs (Switched Capacitor and high BW Continuous Time) architectures is a plus

Apply
20000002 Chiplet Integration Design Solution Development Engineer/ Manager San Jose Master’s Degree with at least 3 years of experience in semiconductor and packaging

IC Design + Packaging + PC Board experience.

Apply
1900008I Custom Design Flow Methodology Engineer San Jose Relevant/adequate experience in PDK related knowledge with advanced nodes.

Looking for 5~ 10 Yr exp.

Apply
1900007D ASIC Design Methodology & Flow Application Engineer San Jose Mandarin Speaker preferred Apply

 

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