CASPA eLetter: No. 204, January 31, 2021

President’s Words

Dear Members,

Things seem to get better since entering 2021. The number of infections of COVID-19 in the US started to decrease in the past two weeks. It is a good sign of recovery. From the CASPA side, we held our 2021 first virtual SIG (Special Interest Group) seminar on January 30. Two experts from the top OSAT providers in the world, Dr. Willian Chen, the Senior Technology Fellow from ASE, and Mr. Yaojian Lin, Vice president of R&D from JCET, shared their insights on future packaging and integration technology. The schedule was adjusted to accommodate 200 audiences from 11 CASPA branches from the US to Asian Pacific. We want to thank all CASPA branches, our alliance GSA, Techcode, and Semiwiki’s for their great help in promoting this event.

The following is the list of events through the end of March. Please mark your calendar.

1. 2/27/2021 Saturday: Immigration Law Seminar

2. 3/27/2021 Saturday: Spring Symposium

Also, for those who are interested in applying for CASPA scholarship for their senior high school kids (by Oct 2021) this year, please make sure to join CASPA life membership before April 16 to be eligible. Our lifetime individual membership is only $100 and there is a limited time 50% discount for college students. Please visit the website to join.

Happy Chinese New Year of Ox!

Best Regards,

Xiaodong Zhang

President and Chairman, CASPA

CASPA Events

Quarterly Special Interest Group Seminar Report

Reporter: Richard Yang

Editor: Allen Liu

Time: 01/30/2021 (5-6:30pm PST)


– Dr. William Chen, Senior Technology Fellow, ASE

– Mr. Yaojin Lin, VP & GM, JCET group

We kicked off the 2021 CASPA Seminar and Symposium series with SIG seminar with two distinguished speakers in packaging. Dr. Chen presented the topic of “The future is Heterogenous Integration: a roadmap for systems of the future”.

He highlighted that Moore’s law economy has met headwinds for high performance computing and shared the technical scaling trends in transistors, thread performance, clock frequency, power and # cores. Dr. Chen projected that Heterogeneous Integration is the future of electronics development. He shared Heterogeneous Integration Roadmaps (HIR) and working groups in the area. The projected applications area have been shared at high level and an example HIR in 5G cellphone has been given.

Mr. Lin presented “Packaging fundamentals of high-performance applications”. He is in sync with Dr. Chen about the future roadmap need of HIR and shared specific examples of chiplet application areas. After reviewing integration flow of various packaging schemes, Mr. Lin shared JCET view point that “Chips-last” is preferable approach for manufacturing timeline and performance.

The seminar ended with a good panel discussion follow up to the discussion of high performance computation packaging roadmap needs and drivers.

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